Call for Industry Innovation Track (IIT)

Submission Deadline: 3 April 2023

The IEEE International Symposium on Circuits and Systems (ISCAS) is the Flagship Conference of the IEEE Circuits and Systems Society (CASS).

The 56th edition of ISCAS will be held in beautiful Monterey, CA from May 21-25, 2023. This global annual event is one of the world’s premiere conferences and is attended by participants from academia, research & industry spread across the globe in the fields of theory, design, and implementation of Circuits & Systems.

Theme of ISCAS 2023 is Technology Disruption and Society, emphasizing the potential of technology and integrated electronic systems to find innovative solutions to challenges facing society today.

The location of the conference in the proximity of Silicon Valley creates an excellent opportunity to bridge between the industry and academic communities. With this mission, ISCAS 2023 is introducing an enhanced focused track on Industry named as “Industry Innovation Track (IIT)”, featuring a simple and expedited submission, acceptance and presentation process.

The Industry Innovation Track at ISCAS 2023 invites abstract presentation submissions from industry and academia.

Submission Instructions

  1. Download template
  2. Fill out template
  3. submit presentation

 

TOPICS OF INTEREST

» Analog and Mixed Signal Circuits & Systems» Multimedia Systems and Applications
» Digital Integrated Circuits and Systems» Communications Circuits and Systems
» Power and Energy Circuits and Systems» Biomedical Circuits and Systems
» Sensory Circuits and Systems» Neural Networks and Neuromorphic Engineering
» Nonlinear Systems and Circuit Theory» Beyond CMOS: Nanoelectronics and Heterogeneous
System Integration
» Digital Signal Processing» Education in Circuits and Systems

SUBMISSIONS

» All presentation submissions to the Industry Innovation Track (IIT) should be made electronically via the website by 10 Mar 2023.» Presentations should clearly state the problem statement/novel ideas, proposed solution (results, and applications) of the contribution, silicon results if relevant/available.
» Use the provided presentation template only. You
can download the presentation template from the
conference website		» The 8-slide presentation will be reviewed by IIT
review team.

» IIT session submission should consist of 8-slides:

 

• 2 slides for intro & reference/acknowledgement


• 6 slides for problem statement, solution, results, and conclusion. All figures should be incorporated in this limit.

» The IIT presentations will not be published in
IEEE Xplore.

 

» Presentations exceeding the page limit or identifying the author’s organization will be rejected without review.

» Submissions will undergo a double-blind review.» Further details will be shared with the selected authors after acceptance of notification.

Industrial Co-Chairs

  • NXP Semiconductors, India

  • Stanford University, USA